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[Documents33M-(target)PCI-attice

Description: 32位33Mhz PCI接口程序设计参考,芯片是Lattice-This block is the top level Verilog module for the Vantis 32 bit 33Mhz PCI Target Reference Design.
Platform: | Size: 16384 | Author: chenguochun | Hits:

[File Formatdianzhen

Description: 如果需要用verilog设计一项比较简单的功能,那么这个浅显易懂的程序能让你很快明白点阵的设计方法,尤其是对那些初学者-If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners
Platform: | Size: 1024 | Author: shadow | Hits:

[OtherSensorHubDesignFilesSourceCode

Description: sensor-hub技术是最新出来的技术,目前用在智能手机领域,手机里面的传感器越来越多,这给CPU带来很大的负担,功耗也随之提高。sensor-hub技术出来后,可以有效的解决这个问题,这是运行在lattice FPGA平台上的verilog源代码,欢迎大家一起交流学习,希望能给你带来帮助。-Sensor- the hub is the latest technology, the current use in the field of smart phones, mobile phone inside the sensor is increasing, which bring great burden to the CPU, power consumption increases.Sensor- the hub technology comes out, can effectively solve the problem, it is running on the lattice verilog code on FPGA platform, welcome to learn together, hope I can bring you help.
Platform: | Size: 9956352 | Author: 叶胜东 | Hits:

[VHDL-FPGA-Veriloglattice_ddr_verilog-for-orca4

Description: 莱迪思的DDR控制器源码(包括仿真与说明文档),DDR为MT46V16M8,Verilog-The DDR controller source of Lattice (including simulation and documentation), DDR is MT46V16M8, Verilog
Platform: | Size: 615424 | Author: 刘佳庆 | Hits:

[VHDL-FPGA-Verilogddr3_demo_verilog

Description: 基于Verilog HDL的ddr3控制器,适用于lattice的ECP3系列-ddr3 controller based on Verilog HDL,used in lattice ECP3 serial FPGA
Platform: | Size: 261120 | Author: 李晓雨 | Hits:

[VHDL-FPGA-Veriloglpc_peri

Description: LPC periph,VHDL and verilog version design, lattice
Platform: | Size: 5120 | Author: Sean Wu | Hits:

[mipiTolvds

Description: mipi转LVDS接口, verilog代码,在lattice 芯片上使用,已验证(MIPI to LVDS interface)
Platform: | Size: 2394112 | Author: tyccwy | Hits:
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